1/7 product preview october 2004 this is preliminary information on a new product now in development. details are subjet to change without notice. STE34NK80Z n-channel 800v - 0.20 ? - 32a isotop zener-protected supermesh? mosfet table 1: general features typical r ds (on) = 0.20 ? extremely high dv/dt capability 100% avalanche tested gate charge minimized very low intrinsic capacitances very good manufacturing repeability description the supermesh? series is obtained through an extreme optimization of st?s well established strip-based powermesh? layout. in addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. such series complements st full range of high voltage mos- fets including revolutionary mdmesh? products. applications high current, high speed switching ideal for welding equipment table 2: order codes figure 1: package figure 2: internal schematic diagram type v dss r ds(on) i d pw STE34NK80Z 800 v < 0.24 ? 32 a 600 w isotop sales type marking package packaging STE34NK80Z e34nk80z isotop tube rev. 2
STE34NK80Z 2/7 table 3: absolute maximum ratings ( ) pulse width limited by safe operating area (1) i sd 32a, di/dt 400 a/s, v dd v (br)dss , t j t jmax. table 4: thermal data table 5: avalanche characteristics table 6: gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the device?s esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device?s integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit v ds drain-source voltage (v gs = 0) 800 v v dgr drain-gate voltage (r gs = 20 k ?) 800 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25c 32 a i d drain current (continuous) at t c = 100c 20 a i dm ( ) drain current (pulsed) 128 a p tot total dissipation at t c = 25c 600 w derating factor 5 w/c v esd(g-s) gate source esd (hbm-c= 100pf, r=1.5 k ? )6kv dv/dt (1) peak diode recovery voltage slope 4.5 v/ns v iso insulation withstand voltage (ac-rms) from all four terminals to external heatsink 2500 v t j t stg operating junction temperature storage temperature -65 to 150 c rthj-case thermal resistance junction-case max 0.2 c/w rthj-amb thermal resistance junction-ambient max 30 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 32 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 35 v) tbd mj symbol parameter test conditions min. typ. max. unit bv gso gate source breakdown voltage i gs = 1 ma (open drain) 30 v
3/7 STE34NK80Z electrical characteristics (t case =25c unless otherwise specified) table 7: on/off table 8: dynamic table 9: source drain diode (1) pulsed: pulse duration = 300 s, duty cycle 1.5 %. (2) pulse width limited by safe operating area. (3) c oss eq. is defined as a constant equivalent capacitance giving the same charging time as coss when vds increases from 0 to 80% vdss symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1ma, v gs = 0 800 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c = 125 c 10 100 a a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 a v gs(th) gate threshold voltage v ds = v gs , i d =100 a 33.754.5v r ds(on) static drain-source on resistance v gs = 10v, i d = 11 a 0.2 0.24 ? symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds = 15 v , i d = 11 a tbd s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 8000 750 190 pf pf pf c oss eq. (3) equivalent output capacitance v gs = 0v, v ds = 0v to 720 v tbd pf t d(on) t r t d(off) t r turn-on delay time rise time turn-off delay time fall time v dd = 450 v, i d = 11 a, r g = 4.7 ?, v gs = 10 v (see figure 4) tbd tbd tbd tbd ns ns ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 720 v, i d = 32 a, v gs = 10v 390 tbd tbd 546 nc nc nc symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 32 128 a a v sd (1) forward on voltage i sd = 32 a, v gs = 0 tbd v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 32 a, di/dt = 100 a/s v dd = 100 v, t j = 25c (see test circuit, figure 5) tbd tbd tbd ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 32 a, di/dt = 100 a/s v dd = 100v, t j = 150c (see test circuit, figure 5) tbd tbd tbd ns c a
STE34NK80Z 4/7 figure 3: unclamped inductive load test cir- cuit figure 4: switching times test circuit for re- sistive load figure 5: test circuit for inductive load switching and diode recovery times figure 6: unclamped inductive wafeform figure 7: gate charge test circuit
5/7 STE34NK80Z dim. mm inch min. typ. max. min. typ. max. a 11.8 12.2 0.466 0.480 b 8.9 9.1 0.350 0.358 c 1.95 2.05 0.076 0.080 d 0.75 0.85 0.029 0.033 e 12.6 12.8 0.496 0.503 f 25.15 25.5 0.990 1.003 g 31.5 31.7 1.240 1.248 h4 0.157 j 4.1 4.3 0.161 0.169 k 14.9 15.1 0.586 0.594 l 30.1 30.3 1.185 1.193 m 37.8 38.2 1.488 1.503 n4 0.157 o 7.8 8.2 0.307 0.322 b e h o n j k l m f a c g d isotop mechanical data
STE34NK80Z 6/7 table 10: revision history date revision description of changes 16-jul-2004 1 first release 15-oct-2004 2 new value inserted in table 3. (v iso )
7/7 STE34NK80Z information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america
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